Q-SYS Core 610 A&E Specifications The System Processor shall be a fully integrated audio, video and control processor intended for use in centralized or edge processing deployment architecture designs. The system processor shall leverage the Dell R250 Server Platform utilizing Intel® Xeon® processors running a real-time Linux operating system developed by QSC, LLC. The system processor shall operate natively on a standard gigabit Ethernet infrastructure available from a broad range of network infrastructure manufacturers, employing DiffServ quality of service, IGMP, IEEE 1588-2008 (PTPv2) precision time protocol, UDP/IP audio and video transport with floating-point format audio data representation. The system shall support 802.1x authentication. The system shall not require IEEE 802.1AS, IEEE 802.1Qat, or IEEE 802.1Qav support on the network infrastructure to function. The overall system latency from analog input to synchronized analog outputs anywhere on the network shall be 3.167 mS. The system shall also be able to achieve an overall system latency of 3.167 mS over Layer-3 routed network infrastructure without any additional hardware, software or connection services between subnets. The system processor shall manage external control interfaces such as Touchscreen Controllers, Paging Stations, Networked Audio I/O Expanders, Network Connected Amplifiers, AV-to-USB Bridging interfaces and IP-based PTZ Conference Room Cameras. The System Processor shall include a built-in SSD for Media File storage with a minimum size of 480 GB. The system processor shall natively offer a minimum network channel capacity of 256 x 256 channels with each stream being configurable as either native Q-LAN networked audio format or AES67 formatted audio streams plus up to 64 x 64 channels of generic Media / WAN streaming capacity. The system processor shall offer up to 64 channels of built-in Acoustic Echo Cancelation at the default tail length of 200 mS which can optionally be configured via software for 100 mS, 300 mS or 400 mS tail length affecting minimum and maximum channel capacity on a linear sliding scale. The system processor shall natively offer up to 64 Softphone instances assignable to the built-in network interface ports. The system processor shall include support for up to 4 tracks of audio recording and 16 tracks of audio playback. Audio playback capacity may be expanded by field application of software licenses to expand this capacity to either 32, 64, or 128 tracks of playback. The system processor shall be scalable by field application of a software license which expands the network I/O capacity to 384 x 384, the generic Media / WAN streaming capacity to 96 x 96, the amount of Acoustic Echo Cancelation at the default tail length of 200 mS to 96 channels, with 50% more general purpose processing power. Additionally, the system processor shall include 8 x 8 Software-based Dante network audio channels and is licensable for up to 256 x 256 Software-based Dante capacity. Software-based Dante channels used subtract from the overall baseline 256 x 256 or capacity scaled 384 x 384 network audio capacity. The rear panel shall offer four network interfaces with individually configurable network services for the purposes of Q-SYS Networking on LAN A: RJ45 at 1000 Mbps only and LAN B: RJ45 at 1000 Mbps only, plus AUX LAN A and AUX LAN B at 10/100/1000 Mbps for integration with other IT services, management, monitoring, or control. The system processor shall offer as standard an internal AC Mains power supply. One RJ45 connection for the Dell iDRAC (integrated Dell Remote Access Controller) port for securely integrating low-level hardware diagnostics, local, and remote monitoring with standard IT toolsets. A web interface shall provide basic network, services, and security configuration, status, and log retrieval. The system processor shall be natively integrated into Q-SYS Designer Software for network discovery, real-time configuration, control, monitoring, supervision, and management. A 9-pin D-Sub connector shall provide RS232 serial communications for integration with, and control of or control by, external devices. The system processor shall store, and operate from, a single design that shall be comprised of audio, video, and control components, wiring, links, text, and graphics on a single or multiple schematic pages. Designs shall include any of the following audio DSP, video, test and measurement components, control components, and layout components: Acoustic Echo Cancellers, Audio Players, Audio Streaming components, Crossfaders, Crossovers, Delay components, Auto Gain control elements, Compressors, Gates, Duckers, Expanders, Ambient Noise Compensators, Limiters, Gain blocks, Graphic Equalizers, Parametric Equalizers, FIR Filters, All-Pass Filters, Band-Pass Filters, Band-Stop Filters, High-Pass Filters, Low-Pass Filters, FIR High-Pass filters, FIR Low-Pass Filters, Dual-Shelf Equalizers, Notch Filters, Meters, Matrix Mixers, Gain-Sharing Automatic Mixers, Gated Automatic Mixers, Signal Routers, Public Address Routers, Room Combiners, Signal Presence Meters, SIP Softphone instances, Tone Generators, Noise Generators, Dual Trace FFT Measurement Modules, Real Time Analyzers, Signal Injectors, Signal Probes, Logic, Value and Position control functions, Lua scripting components, Command Buttons and Triggers, Camera Router, USB Audio Bridge, USB Video Bridge. The system processor shall be optionally enabled with a comprehensive control engine having user space access to a Lua programming environment and ability to host 3rd party plugin integrations via a field applicable software license. The system processor shall support custom user control interfaces on either proprietary touch screen controllers, network computers utilizing a control application, iOS devices, or any device with a standard web browser. Custom control interfaces shall be capable of having multiple user-selectable pages with different controls on each. The system processor shall be 1RU with an enclosure measuring 1.68” x 18.97” x 23.03” (4.28 cm x 48.20 cm x 58.50 cm). The system processor and control engine shall be the Q-SYS Core 610.